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 Data Sheet No.PD60203
IPS022G
DUAL FULLY PROTECTED POWER MOSFET SWITCH
Features
* * * * *
Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection
Product Summary Rds(on) V clamp Ishutdown Ton/Toff Package 150m (max) 50V 5A 1.5s
Description
The IPS022G are fully protected dual low side SMART POWER MOSFETs respectively. They feature overcurrent, over-temperature, ESD protection and drain to source active clamp.These devices combine a HEXFET(R) POWER MOSFET and a gate driver. They offer full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when the temperature exceeds 165oC or when the drain current reaches 5A. These devices restart once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations.
8-Lead SOIC IPS022G (Dual)
Typical Connection
Load
R in series (if needed)
Q
D IN control
S
S Logic signal
(Refer to lead assignment for correct pin configuration)
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IPS022G
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 m copper thickness.
Symbol Parameter
Vds Vin Iin, max Isd cont. Maximum drain to source voltage Maximum input voltage Maximum IN current Diode max. continuous current (1) ( lsd mosfets, rth=125oC/W) Isd pulsed Diode max. pulsed current (1) (for ea. mosfet) Pd Maximum power dissipation(1) ( Pd mosfets, rth=125oC/W) ESD1 ESD2 T stor. Tj max. Electrostatic discharge voltage (Human Body) Electrostatic discharge voltage (Machine Model) Max. storage temperature Max. junction temperature
Min.
-- -0.3 -10
Max.
47 7 +10
Units
V mA
Test Conditions
-- --
1.4 10
A
-- -- -- -55 -40
1 4 0.5 150 +150
W C=100pF, R=1500, kV
o
C=200pF, R=0, L=10H
C
Thermal Characteristics
Symbol Parameter
Rth1 Thermal resistance with standard footprint (2 mos on) (2 mosfets on) Rth2 Thermal resistance with standard footprint (1 mos on) (1 mosfet on) Rth3 Thermal resistance with 1" square footprint (2 mos on) (2 mosfets on)
Min.
-- -- --
Typ.
100 127 60
Max. Units Test Conditions
--
o
C/W
-- --
(1) Limited by junction temperature (pulsed current limited also by internal wiring)
2
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IPS022G
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter
Vds (max) Continuous drain to source voltage VIH High level input voltage VIL Low level input voltage I ds Continuous drain current (TAmbient = 85oC, IN = 5V, rth = 100oC/W, Tj = 85oC) Rin Recommended resistor in series with IN pin Tr-in (max) Max recommended rise time for IN signal (see fig. 2) Fr-Isc (2) Max. frequency in short circuit condition (Vcc = 14V)
Min.
-- 4 0 -- 0.5 -- 0
Max.
35 6 0.5 1 5 1 1
Units
V
A k S kHz
Static Electrical Characteristics
Standard footprint 70 m copper thickness. (Tj = 25oC unless otherwise specified.)
Symbol Parameter
Rds(on) ON state resistance Tj = 25oC Tj = 150oC Idss 1 Drain to source leakage current Idss 2 Drain to source leakage current V clamp 1 Drain to source clamp voltage 1 V clamp 2 Drain to source clamp voltage 2 V in clamp IN to source clamp voltage V th IN threshold voltage Iin, -on ON state IN positive current Iin, -off OFF state IN positive current
Min.
100 -- 0 0 48 50 7 1 25 50
Typ.
130 220 0.01 0.1 54 56 8 1.5 90 130
Max. Units Test Conditions
150 280 25 50 56 60 9.5 2 200 250 m A Vin = 5V, Ids = 1A Vcc = 14V, Tj = 25oC Vcc = 40V, Tj = 25oC Id = 20mA (see Fig.3 & 4) Id=Ishutdown (see Fig.3 & 4) Iin = 1 mA Id = 50mA, Vds = 14V Vin = 5V Vin = 5V
over-current triggered
V
A
Switching Electrical Characteristics
Vcc = 14V, Resistive Load = 10, Rinput = 50, 100s pulse, Tj = 25oC, (unless otherwise specified).
Symbol Parameter
Ton Tr Trf Toff Tf Qin Turn-on delay time Rise time Time to 130% final Rds(on) Turn-off delay time Fall time Total gate charge
Min.
0.15 0.4 2 0.8 0.5 --
Typ. Max. Units Test Conditions
0.5 0.9 6 2 1.3 3.3 1 2 12 3.5 2.5 -- See figure 2 s See figure 2 nC Vin = 5V
(2) Operations at higher switching frequencies is possible. See Appl. notes.
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IPS022G
Protection Characteristics
Symbol Parameter
T sd Isd Vreset Treset EOI_OT Over temperature threshold Over current threshold IN protection reset threshold Time to reset protection Short circuit energy (see application note)
Min.
-- 4 1.5 2 --
Typ.
165 5.5 2.3 10 400
Max. Units Test Conditions
-- 7 3 40 --
o
C A V s J
See fig. 1 See fig. 1 Vin = 0V, Tj = 25oC Vcc = 14V
Functional Block Diagram
All values are typical
DRAIN
47 V
1000 200 k
IN
8.1 V 80 A
S R
Q Q I sense T > 165c
I > Isd
SOURCE Lead Assignments
D1 D1 D2 D2
1
S1
In1
S2 In2
8 Lead SOIC (Dual) IPS022G Part Number
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IPS022G
Vin
5V 0V
Vin 10 %
Ids
I shutdown Isd t < T reset t > T reset
90 %
Tr-in
90 %
Ids
T
Tsd
(165 c)
10 %
Td on tr T shutdown
Td off tf
Vds
Figure 1 - Timing diagram
Figure 2 - IN rise time & switching time definitions
T clamp
Vin
Rem : V load is negative during demagnetization
L R D IN S
V load + 14 V -
Ids
Vds clamp
Vin
( Vcc )
Vds Ids
Vds
5v 0v
( see Appl . Notes to evaluate power dissipation )
Figure 3 - Active clamp waveforms
Figure 4 - Active clamp test circuit
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IPS022G
All curves are typical values with standard footprints. Operating in the shaded area is not recommended.
300 250 200 150 100 50 0 0 1 2 3 4 5 6 7 8
Tj = 25oC Tj = 150 C
o
200% 180% 160% 140% 120% 100% 80% 60% 40% 20% 0% -50 -25 0 25 50 75 100 125 150 175
Figure 5 - Rds ON (m) Vs Input Voltage (V)
Figure 6 - Normalized Rds(on) (%) Vs Tj (oC)
10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4
ton de lay ris e tim e 130% rds on
4
toff delay fall tim e
3
2
1
5
6
7
8
0 0 1 2 3 4 5 6 7 8
Figure 7 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs Input Voltage (V)
Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V)
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IPS022G
100
delay on rise tim e 130% rdson
10
100
delay off fall tim e
10
1
1
0 .1
0 .1
10 100 1000 10000
10
100
1000
10000
Figure 9 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs IN Resistor ()
Figure 10 - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor ()
8
6 5
6 4 4 3 2 2 Isd 25C 0 0 1 2 3 4 5 Ilim 25C 6 7 8 0 -50 -25 0 25 50 75 100 125 150 1
Figure 11 - Current Iim. & I shutdown (A) Vs Vin (V)
Figure 12 - I shutdown (A) Vs Temperature (oC)
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IPS022G
5 4 3
Std. footprint 127C/W 1 m osfet on Std. footprint 100C/W 2 m osfets on
100 T=25C Std. footprint T=100C Std footprint
Current path capability should be above this curve
10
2 1 0 -50
Load characteristic should be below this curve
1
0
50
100
150
200
Figure 13 - Max.Cont. Ids (A) Vs Amb. Temperature (oC)
Figure 14 - Ids (A) Vs Protection Resp. Time (s)
10
single pulse 100 Hz rth=100C/W dT=25C 1kHz rth=100C/W dT=25C
100
10
1
1
0 .1 Single pulse
rth 1 mosfet active
Vbat = 14 V Tjini = T sd for single pulse all curves for 1 mosfet active
rth 2 mosfets active
0 .0 1
0.1
0 .0 1 0 .1 1 10 100
Figure 15 - Iclamp (A) Vs Inductive Load (mH)
Figure 16 - Transient Thermal Imped. (oC/W) Vs Time (s)
8
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IPS022G
200 180 160 140 120 100 80 60 40 20 0 -50 -25 Iin,on Iin,off 0 25 50 75 100 125 150
16 14 12 10 8 6 4 2 0 -50
Treset rise tim e fall time
-25
0
25
50
75
100 125 150
Figure 17 - Input Current (uA) Vs Junction Temperature (oC)
Figure 18 - Rise Time, Fall Time and Treset (s) Vs Tj (oC)
120% 115% 110% 105% 100% 95% 90% 85% 80% -50 -25 0 25 50 75 100 125 150 Vds clamp @ Isd Vin clamp @ 10mA
Figure 19 -Vin clamp and Vds clamp2 (%) Vs Tj (oC)
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IPS022G
Case Outline
D A 5 B
FOOT PRINT 8X 0.72 [.028]
DIM A b
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040 c
8 6 E 1
7
6
5 H 0.25 [.010] A
6.46 [.255]
D E e e1 H K L
8X 1.78 [.070]
2
3
4
.050 BAS IC .025 BAS IC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BAS IC 0.635 BAS IC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X
e e1 A C
3X 1.27 [.050]
y
K x 45 y 0.10 [.004]
8X b 0.25 [.010]
A1 CAB
8X L 7
8X c
NOTES: 1. DIMENSIONING & T OLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES ]. 4. OUT LINE CONFORMS T O JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS . MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS T HE LENGTH OF LEAD FOR SOLDERING TO A S UBS TRAT E.
8-Lead SOIC
01-6027 01-0021 11 (MS-012AA)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 10/16/2002
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